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Xilinx Aurora Serial I/O Open Protocol Tops 1000 Licensees -- FPGA Industry's Most Widely Adopted 3.125 Gbps Solution

Fastest Ramping Adoption Rate Due to Customer Demand for Virtex-II Pro Serial I/O Solutions

SAN JOSE, Calif., Nov. 6 /PRNewswire/ -- Xilinx, Inc. today announced that over 1000 designers have licensed the company's Aurora high-speed serial I/O open protocol for use with its flagship Virtex-II Pro(TM) family with multiple 3.125 Gbps RocketIO serial transceivers. Today's news, coupled with the previously announced 10,000 Virtex-II Pro customer engagements, demonstrates strong customer demand for the Virtex-II Pro family for use in a variety of applications such as terabit routers and switches, medical imaging, HDTV broadcast systems, bladed servers and storage subsystems.

(Logo: http://www.newscom.com/cgi-bin/prnh/20020822/XLNXLOGO )

"Aurora is a lightweight, high-performance, point-to-point serial I/O solution that allows customers to easily take advantage of the high-speed serial transceivers in the Virtex-II Pro family," said Andy DeBaets, senior director of applications and systems engineering at Xilinx. "Customers are rapidly embracing the Virtex-II Pro family and the total Aurora solution to leverage the low system cost and performance benefits afforded by serial I/O technologies."

Xilinx first introduced the Aurora protocol in October 2002 as a scalable, resource-efficient connectivity solution. The protocol provides designers with the flexibility to partition systems without having to route hundreds of pins on a printed circuit board. Aurora uses gigabit serial technology at the physical layer and transfers encoded data at up to 3.125 Gbps with as little as four pins. Additionally, Aurora can aggregate one to twenty four physical lanes together into a single logical channel. With this flexibility, Aurora can be scaled for chip-to-chip, board-to-board, chip-to-backplane and box-to-box interconnect.

Xilinx offers customers total solution assurance by offering the open protocol specification, ready-to-use reference designs supporting multiple lane widths, and a fully compliant bus functional model (BFM). The BFM cuts overall system verification time and costs by allowing system designers to easily perform compliance tests and verification for 3rd party implementations of the Aurora protocol in both FPGAs and ASICs.

Availability and Pricing

The Aurora open protocol specification v1.2, reference designs and bus functional models are available immediately free of charge. Customers can register and download the solution on the Aurora Solutions Suite website at http://www.xilinx.com/aurora .

About Xilinx

Xilinx is the worldwide leader in complete programmable logic solutions. For more information, visit http://www.xilinx.com/.

CONTACT: Jennifer Wright Van Every of Xilinx, Inc., +1-408-879-7727, or
jennifer.vanevery@xilinx.com

Web site: http://www.xilinx.com/

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